This stage makes heavy use of the video memory and the video memory bus 这个过程中对显存和显存总线的负担比较大。
With smp , all memory access is posted to the same shared memory bus 通过smp ,所有的内存访问都传递到相同的共享内存总线。
Memory bus bandwidth 内存总线带宽
Numa alleviates these bottlenecks by limiting the number of cpus on any one memory bus and connecting the various nodes by means of a high speed interconnection Numa通过限制任何一条内存总线上的cpu数量并依靠高速互连来连接各个节点,从而缓解了这些瓶颈状况。
This works fine for a relatively small number of cpus , but not when you have dozens , even hundreds , of cpus competing for access to the shared memory bus 这种方式非常适用于cpu数量相对较少的情况,但不适用于具有几十个甚至几百个cpu的情况,因为这些cpu会相互竞争对共享内存总线的访问。
The memory bus is the computer bus which connects the main memory to the memory controller in computer systems. Originally, general-purpose buses like VMEbus and the S-100 bus were used, but to reduce latency, modern memory buses are designed to connect directly to DRAM chips, and thus are designed by chip standards bodies such as JEDEC.